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  1/12 april 2001 n high speed: f max = 250mhz (typ.) at v cc =5v n low power dissipation: i cc =4 m a(max.) at t a =25 c n compatible with ttl outputs v ih = 2v (min.), v il = 0.8v (max.) n 50 w transmission line driving capability n symmetrical output impedance: |i oh |=i ol = 24ma (min) n balanced propagation delays: t plh @ t phl n operating voltage range: v cc (opr) = 4.5v to 5.5v n pin and function compatible with 74 series 74 n improved latch-up immunity description the 74act74 is an advanced high-speed cmos dual d-type flip flop with preset and clear fabricated with sub-micron silicon gate and double-layer metal wiring c 2 mos tecnology. a signal on the d input is transferred to the q and q outputs during the positive going transition of the clock pulse. clear and preset are independent of the clock and accomplished by a low setting on the appropriate input. the device is designed to interface directly high speed cmos systems with ttl, nmos and cmos output voltage levels. all inputs and outputs are equipped with protection circuits against static discharge, giving them 2kv esd immunity and transient excess voltage. 74act74 dual d-type flip flop with preset and clear pin connection and iec logic symbols order codes package tube t & r dip 74act74b sop 74ACT74M 74ACT74Mtr tssop 74act74ttr tssop dip sop
74act74 2/12 input and output equivalent circuit pin description truth table x : don't care logic diagram this logic diagram has not be used to estimate propagation delays pin no symbol name and function 1, 13 1clr, 2clr asyncronous reset - direct input 2, 12 1d, 2d data inputs 3, 11 1ck, 2ck clock input (low to high, edge triggered) 4, 10 1pr, 2pr asyncronous set - direct input 5, 9 1q, 2q true flip-flop outputs 6, 8 1q, 2q complement flip-flop outputs 7 gnd ground (0v) 14 v cc positive supply voltage inputs outputs function clr pr d ck q q l h x x l l clear h l x x h l preset l lxxhh hhl lh hhh hl hhx q n q n no change
74act74 3/12 absolute maximum ratings absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these conditions is not implied. recommended operating conditions 1) v in from 0.8v to 2.0v symbol parameter value unit v cc supply voltage -0.5 to +7 v v i dc input voltage -0.5 to v cc + 0.5 v v o dc output voltage -0.5 to v cc + 0.5 v i ik dc input diode current 20 ma i ok dc output diode current 20 ma i o dc output current 50 ma i cc or i gnd dc v cc or ground current 200 ma t stg storage temperature -65 to +150 c t l lead temperature (10 sec) 300 c symbol parameter value unit v cc supply voltage 4.5 to 5.5 v v i input voltage 0 to v cc v v o output voltage 0 to v cc v t op operating temperature -55 to 125 c dt/dv input rise and fall time v cc = 4.5 to 5.5v (note 1) 8 ns/v
74act74 4/12 dc specifications 1) maximum test duration 2ms, one output loaded at time 2) incident wave switching is guaranteed on transmission lines with impedances as low as 50 w ac electrical characteristics (c l = 50 pf, r l = 500 w , input t r =t f = 3ns) (*) voltage range is 5.0v 0.5v symbol parameter test condition value unit v cc (v) t a =25 c -40 to 85 c -55 to 125 c min. typ. max. min. max. min. max. v ih high level input voltage 4.5 v o = 0.1 v or v cc -0.1v 2.0 1.5 2.0 2.0 v 5.5 2.0 1.5 2.0 2.0 v il low level input voltage 4.5 v o = 0.1 v or v cc -0.1v 1.5 0.8 0.8 0.8 5.5 1.5 0.8 0.8 0.8 v v oh high level output voltage 4.5 i o =-50 m a 4.4 4.49 4.4 4.4 5.5 i o =-50 m a 5.4 5.49 5.4 5.4 4.5 i o =-24 ma 3.86 3.76 3.7 v 5.5 i o =-24 ma 4.86 4.76 4.7 v ol low level output voltage 4.5 i o =50 m a 0.001 0.1 0.1 0.1 5.5 i o =50 m a 0.001 0.1 0.1 0.1 4.5 i o =24 ma 0.36 0.44 0.5 5.5 i o =24 ma 0.36 0.44 0.5 i i input leakage cur- rent 5.5 v i =v cc or gnd 0.1 1 1 m a i cct max i cc /input 5.5 v i =v cc - 2.1v 0.6 1.5 1.6 ma i cc quiescent supply current 5.5 v i =v cc or gnd 44040 m a i old dynamic output current (note 1, 2) 5.5 v old = 1.65 v max 75 50 ma i ohd v ohd = 3.85 v min -75 -50 ma symbol parameter test condition value unit v cc (v) t a =25 c -40 to 85 c -55 to 125 c min. typ. max. min. max. min. max. t plh t phl propagation delay time ck to q or q 5.0 (*) 5.0 10.0 11.0 11.0 ns t plh t phl propagation delay time pr or clr to qorq 5.0 (*) 5.0 10.0 11.0 11.0 ns t w pulse width high or low, ck or pr or clr 5.0 (*) 1.5 5.0 6.0 6.0 ns t s setup time d to ck high or low 5.0 (*) 0.5 3.0 3.5 3.5 ns t h hold time d to ck high or low 5.0 (*) -0.5 1.0 1.0 1.0 ns t rem removal tim| pr or clr to ck 5.0 (*) -0.7 1.0 1.0 1.0 ns f max maximum clock frequency 5.0 (*) 100 250 85 85 mhz
74act74 5/12 capacitive characteristics 1) c pd is defined as the value of the ic's internal equivalent capacitance which is calculated from the operating current consumption without load. (refer to test circuit). average operating current can be obtained by the following equation. i cc(opr) =c pd xv cc xf in +i cc /2 (per fli p-flop) test circuit c l = 50pf or equivalent (includes jig and probe capacitance) r l =r 1 = 500 w or equivalent r t =z out of pulse generator (typically 50 w ) symbol parameter test condition value unit v cc (v) t a =25 c -40 to 85 c -55 to 125 c min. typ. max. min. max. min. max. c in input capacitance 5.0 3 pf c pd power dissipation capacitance (note 1) 5.0 f in = 10mhz 43 pf
74act74 6/12 waveform 1: propagation delays, setup and hold times (f=1mhz; 50% duty cycle)
74act74 7/12 waveform 2: propagation delays (f=1mhz; 50% duty cycle)
74act74 8/12 waveform 3: recovery times (f=1mhz; 50% duty cycle) waveform 4: pulse width
74act74 9/12 dim. mm inch min. typ. max. min. typ. max. a1 0.51 0.020 b 1.39 1.65 0.055 0.065 b 0.5 0.020 b1 0.25 0.010 d 20 0.787 e 8.5 0.335 e 2.54 0.100 e3 15.24 0.600 f 7.1 0.280 i 5.1 0.201 l 3.3 0.130 z 1.27 2.54 0.050 0.100 p001a plastic dip-14 mechanical data
74act74 10/12 dim. mm inch min. typ. max. min. typ. max. a 1.75 0.068 a1 0.1 0.2 0.003 0.007 a2 1.65 0.064 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 c 0.5 0.019 c1 45 (typ.) d 8.55 8.75 0.336 0.344 e 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 7.62 0.300 f 3.8 4.0 0.149 0.157 g 4.6 5.3 0.181 0.208 l 0.5 1.27 0.019 0.050 m 0.68 0.026 s 8 (max.) p013g so-14 mechanical data
74act74 11/12 dim. mm inch min. typ. max. min. typ. max. a 1.1 0.433 a1 0.05 0.10 0.15 0.002 0.004 0.006 a2 0.85 0.9 0.95 0.335 0.354 0.374 b 0.19 0.30 0.0075 0.0118 c 0.09 0.20 0.0035 0.0079 d 4.9 5 5.1 0.193 0.197 0.201 e 6.25 6.4 6.5 0.246 0.252 0.256 e1 4.3 4.4 4.48 0.169 0.173 0.176 e 0.65 bsc 0.0256 bsc k0 o 4 o 8 o 0 o 4 o 8 o l 0.50 0.60 0.70 0.020 0.024 0.028 c e b a2 a e1 d 1 pin 1 identification a1 l k e tssop14 mechanical data
74act74 12/12 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringe ment of patents or other righ ts of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this pub lication are subject to change without notice. thi s pub lication supersedes and replaces all information previously supplied. stmicroelectronics prod ucts are not authori zed for use as critical components in life suppo rt devices or systems without express written approval of stmicroelectronics. ? the st logo is a registered trademark of stmicroelectronics ? 2001 stmicroelectronics - printed in italy - all rights reserved stmicroelectronics group of companies australia - brazil - china - finland - france - germany - hong kong - india - italy - japan - malaysia - malta - morocco singapore - spain - sweden - swit zerland - united kingdom ? http://w ww.st.com


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